The present disclosure relates to a semiconductor device and a method for fabricating the same, and more particularly to an interconnection technique of forming interconnects in a porous insulating film.
With decrease in the size of interconnects accompanying the recent enhancement in the integration density of semiconductor devices, the capacitance between interconnects has increased, and as a result, RC delay in interconnects has posed a problem. In view of this problem, there have been requests for reduction in the dielectric constant of an interlayer insulating film. As an interlayer insulating film with a reduced dielectric constant, a porous insulating film having pores formed in the insulating film is considered effective. However, with the presence of pores, a porous insulating film is susceptible to plasma damage during dry etching and ashing, and also easily impregnated with a cleaning solution during cleaning. As a result, the properties of the porous insulating film decrease, causing decrease in the electrical properties and reliability of the semiconductor devices.
To overcome the above problem, a method as follows is proposed (see Japanese Patent Publication No. 2005-142473, for example). That is, a non-porous insulating film containing a pore formation material is deposited on a silicon wafer, and then subjected to dry etching using a resist pattern formed on the non-porous insulating film as a mask, to form interconnect grooves and via holes in the non-porous insulating film. After removal of the remaining resist pattern by ashing, the surface of the non-porous insulating film is cleaned. Subsequently, the pore formation material is removed from the non-porous insulating film by heating, to form a porous insulating film. Thereafter, copper interconnects and vias are respectively formed in the interconnect grooves and the via holes with a barrier metal film interposed between the interconnects or the vias and the insulating film.